This invention relates in general to electronic device packages and in particular, to a packaged electronic device assembly having a carrier structure where the assembly is ready to be mounted onto a substrate such as a printed circuit (PC) board and attached and electrically connected to contacts on the substrate.
Typically, integrated circuits are housed in structures where the integrated circuit chip and inner portions of leads are surrounded or encapsulated by material forming the package body. The outer ends of the leads protrude from the package body and are attached and electrically connected by conventional methods such as soldering to a PC board, a fixture or socket. With the development of denser and more complex circuitry on integrated circuit chips, there is relentless pressure to reduce the size of the package and/or increasing pin or lead counts. To accomplish such goals, thinner and more fragile leads have frequently been used. With the use of thinner and more fragile leads, lead bending becomes an even more significant problem than before in the semiconductor chip packaging technology.
After the semiconductor die is bonded to a lead frame and encapsulated, the leads are bent into predetermined shapes in a step known as lead forming, so that the end portions of the leads are in proper locations for bonding to a substrate such as a PC board. In the case of surface mount packages, this usually means bending the leads so that the lead end portions are substantially coplanar, so that they are in position to be soldered to contacts on top of the PC board.
Before integrated circuit packages are shipped to customers, they must usually be first tested. Typically, the leads of the packages are first formed into proper shapes ready for connection to PC boards or other substrates before the packages are tested. Testing procedures after the exposed outer ends of the leads outside the package body have been formed sometimes cause the outer ends of the leads to be bent. After testing, the packages are frequently transferred to trays or other containers for shipment to customers. The formed leads are sometimes bent during the transfer process. When the outer ends of the leads are soldered to PC boards or other substrates, this mounting and soldering procedure normally requires the outer ends of the leads to be in proper positions. If lead bending causes the positions of the outer lead ends to deviate from such predetermined positions by greater than a given tolerance, the bent leads must first be corrected or the package must be discarded altogether. For this reason, it is important to avoid bending the leads during the testing or other handling procedures after the leads have been formed but before the packages are shipped to customers.
One solution to the above-described lead bending problem is to encapsulate portions of the outer leads in a carrier frame. One such technique is described by Lin et al. in U.S. Pat. No. 4,897,602. As described in Lin et al., such technique involves employing a copper foil tape with finger contacts that extend further out than that normally required for forming the outer lead ends, where the extended portion forms splayed out portions serving as probe ends for use during testing of the die inside the package. After the semiconductor die and the inner portions of the leads are encapsulated to form the chip package, a carrier frame is molded around and spaced from the periphery of the die or chip package to enclose the extended portions of the leads except for the probe ends. The probe ends are exposed within a slot in the frame or extend from the ends of the frame so that probe tips of testing equipment can be pressed thereon to test the die and its bonds. The stiff molded carrier frame disclosed by Lin et al. acts to support the probe ends of the lead fingers and protects and stiffens the foil tape for the testing operations and for shipping and handling purposes. When the package is ready to be mounted onto the PC board, the carrier frame and probe ends are sheared away and discarded and the remaining portions of the fingers are formed into leads to be interconnected to the PC board. Lin et al. proposed an improved package with carrier frame where a different and relatively lower quality and less expensive material is used for the carrier structure than for the package body to reduce the cost of the package. A package similar to the one described above is also described in U.S. Pat. No. 4,837,184 to Lin et al.
The above-described packages with carrier frames are disadvantageous in that the leads have not been formed when they are shipped to customers. This means that, before customers can mount and connect the package to a substrate such as a printed circuit board, the carrier frame must be sheared off together with the probe ends and the remaining outer lead ends appropriately formed before they can be soldered onto PC boards. Thus customers must perform the lead forming procedure before the packages can be mounted and the package-carrier assembly of Lin et al. is therefore cumbersome for customers to use. Furthermore, lead forming equipment is expensive and can cost up to $100,000 for equipment appropriate for forming leads using thicker lead frames. Because lead forming equipment is expensive, many customers, and in particular smaller companies, may not have the appropriate equipment for forming the leads. It is therefore desirable to provide an improved semiconductor die package with carrier frame where customers do not need to perform the lead forming step. Furthermore, since the carrier frame and the probe ends are sheared off in the above-described devices before the packages can be mounted, the carrier frame and probe ends must be significantly larger than the package itself so that the package-carrier assembly occupies much more space than a package without a carrier frame. This increases the bulk and therefore the cost of shipment to customers. Since a portion of the lead frame is sheared off and discarded, fewer packages will be obtained per unit area of the lead frame, which also increases the cost of the packages. It is therefore desirable to provide a semiconductor package-carrier assembly which is more compact, more efficient in the use of materials and less expensive to ship.